Simone Campanoni

Tenure-track assistant professor
Department of Electrical Engineering and Computer Science
Northwestern University

MARC: Mining Advantages in Randomized Code

The application landscape is rapidly evolving including more often randomized algorithms. Current compilers ignore whether or not a program being compiled is randomized, leaving important opportunities unexplored. The MARC research project aims to identify and exploit such opportunities.


Selected publications

Enrico Armenio Deiana, Vincent St-Amour, Peter Dinda, Nikos Hardavellas, and Simone Campanoni
Unconventional Parallelization of Nondeterministic Applications.
International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), 2018



Other publications

Enrico Armenio Deiana, Vincent St-Amour, Peter Dinda, Nikos Hardavellas, and Simone Campanoni
POSTER: The Liberation Day of Nondeterministic Programs
International Conference on Parallel Architectures and Compilation Techniques (PACT), 2017
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Parallelizing Sequentially-Designed Code

The multicore revolution in microprocessor architecture has left most programs behind. A program that maps easily to multicore architectures is the exception, not the rule. We are interested in showing multiple ways to parallelize the others (e.g., common, sequentially-designed programs) for modern and next-generation architectures.


Selected publications

Simone Campanoni, Kevin Brownell, Svilen Kanev, Timothy M. Jones, Gu-Yeon Wei, and David Brooks
Automatically Accelerating Non-Numerical Programs By Extracting Threads with an Architecture-Compiler Co-Design
Communication ACM Research Highlights (CACM), 2017
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Niall Murphy, Timothy Jones, Robert Mullins, and Simone Campanoni
Performance Implications of Transient Loop-Carried Data Dependences in Automatically Parallelized Loops
International Conference on Compiler Construction (CC), 2016
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Simone Campanoni, Glenn Holloway, Gu-Yeon Wei, and David Brooks
HELIX-UP: Relaxing Program Semantics to Unleash Parallelization
International Conference on Code Generation and Optimization (CGO), 2015
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Simone Campanoni, Kevin Brownell, Svilen Kanev, Timothy M. Jones, Gu-Yeon Wei, and David Brooks
HELIX-RC: An Architecture-Compiler Co-Design for Automatic Parallelization of Irregular Programs
International Conference on Computer Architecture (ISCA), 2014
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IEEE Micro’s Top Picks in Computer Architecture Conferences honorable mention, 2014

Simone Campanoni, Timothy M. Jones, Glenn Holloway, Gu-Yeon Wei, and David Brooks
HELIX: Making the Extraction of Thread-Level Parallelism Mainstream
IEEE computer Society Digital Library (IEEE Micro), 2012
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Simone Campanoni, Timothy M. Jones, Glenn Holloway, Gu-Yeon Wei, and David Brooks
The HELIX Project: Overview and Directions
Design Automation Conference (DAC), 2012
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Simone Campanoni, Timothy M. Jones, Glenn Holloway, Vijay Janapa Reddi, Gu-Yeon Wei, and David Brooks
HELIX: Automatic Parallelization of Irregular Programs for Chip Multiprocessing
International Conference on Code Generation and Optimization (CGO), 2012
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Other publications

Alessandro A. Nacci, Gianluca C. Durelli, Josue Pagan, Marina Zapater, Matteo Ferroni, Riccardo Cattaneo, Monica Vallejo, Simone Campanoni, Jose Ayala, and Marco D. Santambrogio
Power-Awareness and Smart-Resource Management in Embedded Computing Systems
International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), 2015
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Khalid Al-Hawaj, Simone Campanoni, Gu-Yeon Wei, and David Brooks
Unified Cache: A Case for LowLatency Communication
International Workshop on Parallelism in Mobile Platforms (PRISM), 2015
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Niall Murphy, Timothy M. Jones, Simone Campanoni, and Robert Mullins
Limits of Static Dependence Analysis for Automatic Parallelization
International Workshop on Compilers for Parallel Computing (CPC), 2015
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Simone Campanoni, Svilen Kanev, Kevin Brownell, Gu-Yeon Wei, and David Brooks
Breaking CyclicMultithreading Parallelization with XML Parsing
International Workshop on Parallelism in Mobile Platforms (PRISM), 2014
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Michele Tartara, Stefano Crespi Reghizzi, and Simone Campanoni
Extending Hammocks for Parallelism Detection
Italian Conference on Theoretical Computer Science (ICTCS), 2010
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Compiling for Resilient Architecture

Safety margins in conventional architectures are conservative to always avoid computational errors leading to energy inefficiencies. Resilient architectures squeeze these margins to save energy, correcting errors through costly rollback. Co-designed compilers can help resilient architectures to reduce their overhead by adapting the running code to their run-time characteristics


Selected publications

Vijay Janapa Reddi, Svilen Kanev, Wonyoung Kim, Simone Campanoni, Michael D. Smith, Gu-Yeon Wei, and David Brooks
Voltage Noise in Production Processors
IEEE Micro’s Top Picks in Computer Architecture Conferences, 2011
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Vijay Janapa Reddi, Svilen Kanev, Wonyoung Kim, Simone Campanoni, Michael D. Smith, Gu-Yeon Wei, and David Brooks
Voltage Smoothing: Characterizing and Mitigating Voltage Noise in Production Processors via Software-guided Thread Scheduling
International Symposium on Microarchitecture (MICRO), 2010
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Vijay Janapa Reddi, Simone Campanoni, Meeta S. Gupta, Kim Hazelwood, Michael D. Smith, Gu-Yeon Wei, and David Brooks
Eliminating Voltage Emergencies via Software-Guided Code Transformation
ACM Transactions on Architecture and Code Optimization (TACO), 2010
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Vijay Janapa Reddi, Simone Campanoni, Meeta S. Gupta, Michael D. Smith, Gu-Yeon Wei, and David Brooks
Software-Assisted Hardware Reliability: Abstracting Circuit-level Challenges to the Software Stack
Design Automation Conference (DAC), 2009
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Bytecode Virtual Machines

Virtual machines designed to execute bytecode programs are everywhere. The most successful and widely-adopted examples are Java and .NET. Browsers are virtual machines as well thanks to their ability to run programs written in multiple languages (e.g., JavaScript). A bytecode virtual machine usually includes several components. Code generators, code optimizers, garbage collectors, execution engine, and profilers are the most common ones. Understanding interactions of these components allows them to be co-designed, which open interesting optimization opportunities.


Selected publications

Simone Campanoni, Giovanni Agosta, Stefano Crespi Reghizzi, and Andrea Di Biagio
A highly flexible, parallel virtual machine: design and experience of ILDJIT
Software: Practice and Experience (SPE), 2010
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Simone Campanoni, Martino Sykora, Giovanni Agosta, and Stefano Crespi Reghizzi
Dynamic Look Ahead Compilation: a technique to hide JIT compilation latencies in multicore environment
International Conference on Compiler Construction (CC), 2009
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