Hello, I am Majed Valad Beigi
PhD Candidate at Northwestern University
I am a Ph.D. Candidate in the Electrical Engineering and Computer Science (EECS) department at Northwestern University. I am now with the Microarchitecture Research Laboratory, working under the advisement of Prof. Gokhan Memik. My current research interests include efficient computer architecture for emerging technologies, temperature aware processor and memory system design, and optical interconnects.
Northwestern University, Evanston, IL, USA2014 - present
Ph.D. Candidate, Computer Engineering, Electrical Engineering and Computer Science Department
Shahid Beheshti University (Previously, National University of IRAN), Tehran, IRAN2009 - 2011
M.S., Computer Architecture Engineering, Electrical and Computer Engineering Department
Shahid Rajaee University, Tehran, IRAN2004 - 2008
B.S., Computer Hardware Engineering, Electrical and Computer Engineering Department
Honors and Awards
Northwestern EECS Poster Fair Winner2016
1st place poster in the Computer Engineering department
Northwestern EECS Poster Fair Winner2015
2nd place poster in the Computer Engineering department
International Robocup Competition, Magdeburg, Germany2011
Ranked 1st in 2D Soccer Simulation
Shahid Beheshti University2011
- Qualified as the Honored and Talented Student
- Ranked 2nd among all Computer Architecture students in M.S.
International Robocup Competition, Hannover, Germany2009
Ranked 2nd in 3D Soccer Simulation
Shahid Rajaee University2008
Qualified as the Honored and Talented Student
Research Assistant, Northwestern University2014 - present
Microarchitecture Research Laboratory
Teaching Assistant, Northwestern University2014 - present
- Fall 2016 : Computer Architecture
- Spring 2016 : Introduction to Parallel Computing
- Winter 2016 : VLSI Systems Design
- Winter 2016 : ASIC and FPGA Design
- Fall 2015 : Introduction to Computer Systems
- Spring 2015 : Advanced Digital Logic Design
- Winter 2015 : Introduction to Computer Engineering
- Fall 2014 : Introduction to Computer Engineering
Research Scholar, Northwestern University2013 - 2014
Microarchitecture Research Laboratory
Instructor, Shahid Beheshti University2011 - 2012
- Winter 2012: Introduction to Information Technology
- Fall 2012: Computer Foundations
- Fall 2011: Computer Foundations
Invited Lecturer, Shahid Rajaee University2011
Fall 2011: Computer Systems Programming
Teaching Assistant, Shahid Beheshti University2010
- Winter 2010 : Digital Circuit Design
- Fall 2010 : Computer Architecture
Technical Referee,International Robocup Competition, Magdeburg, Germany2010
3D Soccer Simulation
Technical Committee,Khwarazmi Youth Award, IRAN2009
3D Soccer Simulation
2017 - The Design Automation Conference (DAC)
2016 - International Conference on Computer Design (ICCD)
2016 - International Symposium on Multicore Embedded Socs (MCSoC)
2015 - International Conference on Computer Design (ICCD)
2015 - International Symposium on Multicore Embedded Socs (MCSoC)
2015 - 18th International Symposium on Computer Architecture & Digital Systems (CADS)
2014 - IEEE Transactions on Parallel and Distributed Systems (TPDS)
Conference (C), Journal (J), Workshop (W), Team Description (TD), Technical Report (TR)
[C.9] Majed Valad Beigi and Gokhan Memik, TESLA: Using Microfluidics to Thermally Stabilize 3D Stacked STT-RAM Caches, In the 34th IEEE International Conference on Computer Design (ICCD-2016), Phoenix, AZ, 2016 [PDF].
[C.8] Majed Valad Beigi and Gokhan Memik, TAPAS: Temperature-aware Adaptive Placement for 3D Stacked Hybrid Caches, In international Symposium on Memory Systems (MEMSYS-2016), Washington, DC, 2016 [PDF].
[C.7] Majed Valad Beigi and Gokhan Memik, Therma: Thermal-aware Run-time Thread Migration for Nanophotonic Interconnects, In international Symposium on Low power electronics and design (ISLPED-2016), San Francisco, CA, 2016 [PDF].
[TR.2] Majed Valad Beigi, VLSI Design Using Cadence, Outline of steps used by students during VLSI Systems Design course projects at Northwestern University, 2016.
[TR.1] Majed Valad Beigi, Handwritten Character Recognition Using BP NN, LAMSTAR NN and SVM, Northwestern University, 2015.
[W.1] Majed Valad Beigi and Gokhan Memik, MIN: A Power Efficient Mechanism to Mitigate the Impact of Process Variations in Nanophotonic Networks, In 4th Greater Chicago Area Systems Research Workshop (GCASR), Chicago, IL, April 2015.
[C.6] Majed Valad Beigi and Gokhan Memik, MIN: A Power Efficient Mechanism to Mitigate the Impact of Process Variations in Nanophotonic Networks, In international Symposium on Low power electronics and design (ISLPED-2014), pp.299-302,La Jolla, CA, 2014 [PDF].
[J.7] Majed ValadBeigi, Farshad Safaei and Bahareh Pourshirazi, Application-aware virtual paths insertion for NoCs, Elsevier Journal of Microelectronics, Vol. 45, Issue.4, pp. 454-462, 2014 [PDF].
[C.5] Majed ValadBeigi, Farshad Safaei, Armin Belghadr and Bahareh Pourshirazi, A Dependable and Power Efficient NoC Architecture, In Proceeding of IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Brazil, 2013 [PDF].
[C.4] Majed ValadBeigi, Farshad Safaei and Bahareh Pourshirazi, An Energy-Efficient Reconfigurable NoC Architecture with RF-Interconnects, In Proc. to 16th EuroMicro conference on Digital System Design (DSD), Spain, 2013 [PDF].
[J.6] Majed ValadBeigi and Farshad Safaei, PDR: A Protocol for Dynamic Network Reconfiguration Based on Deadlock Recovery Scheme, Elsevier Journal of Simulation Modeling Practice and Theory, Vol. 24, Issue. 1, pp 59-70, 2012 [PDF].
[J.5] Farshad Safaei and Majed Valad Beigi, An Efficeint Routing Methodology for Tolerating Static and Dynamic Faults in 2-D Mesh Networks-On-Chip, Elsevier Journal of Microprocessors and MicroSystems, Vol. 36, Issue. 7, pp 531-542, 2012 [PDF].
[J.4] Majed ValadBeigi, Farshad Safaei, and Bahareh Pourshirazi, DBR: A Simple, Fast and Efficient Dynamic Network Reconfiguration Based on Deadlock Recovery Scheme, International Journal of VLSI design and Communication Systems (VLSICS) Vol.3, No.5, 2012 [PDF].
[J.3] F.Safaei and M. ValadBeigi, A Probabilistic Approach to Analysis of Reliability in n-D Meshes with Interconnect Router Failures, International Journal of Computer Networks and Communications (IJCNC), Vol.3, No.4, pp 87-97, July.2011 [PDF].
[C.3] M. ValadBeigi, F. Safaei, A. Mortazavi, Evaluating the Performance of Software Based Routing Algorithms for Dynamic Fault-Tolerance in Tori), IEEE Computer Society, the 11th International conference on parallel and distributed computing, applications and technologies (PDCAT-10), pp. 351-357, Dec.2010 [PDF].
[C.2] M.ValadBeigi, H. Nabizadeh, M.Abbaspour, Optimized real-time and load balanced routing in dynamic networks using genetic algorithm, 9th International Symposium on ELECTRONICS AND TELECOMMUNICATIONS, pp. 229-233, Nov.2010 [PDF].
[TD.2] Kh. Niki Maleki, M. Hadi Valipour, R. Yeylaghi Ashrafi, Sadegh Mokari, M. ValadBeigi, M. Akbar, M. Javanmard, F. Mansourzadeh, S. Hajazim, and M. R. Jamalii, Scorpius Team Description Paper, Soccer Simulation 3D league, Singapore 2010, as a part of qualification materials, Proc. RoboCup2010, Singapore, 2010 [PDF].
[J.2] M. Hadi Valipour, Bavar Amirzafari, Kh. Niki Maleki, Majed ValadBeigi, and Negin Daneshpour, Concepts of Service Orientation in Software Engineering: A Brief Survey, MASAUM Journal Of Reviews and Surveys, Vol. 1, No. 3, pp 224-250, Nov.2009 [PDF].
[TD.1] Kh. Niki Maleki, M. Hadi Valipour, R. Yeylaghi Ashrafi, S. Mokari, M. ValadBeigi, M.R.Jamali, Scorpius Team Description Paper, Soccer Simulation 3D league, Graz 2009, as a part of qualification materials, Proc. RoboCup 2009, Graz, Austria, 2009 [PDF].
[J.1] Majed ValadBeigi and Farshad Safaei, Deadlock-Free Path-Based Fault-Tolerant Multicast Communications on 2-D Mesh Networks-on-Chip, the CSI Journal on Computer Science and Engineering(JCSE), Vol. 6, No. 2and4 (b), pp 36-45, 2008 [PDF].
[C.1] M. R. Jamali, M. ValadBeigi, M. Dehyadegari, Z. Navabi and C. Lucas, Toward Embedded Emotionally Intelligent System, 5th IEEE EAST-WEST DESIGN and TEST INTERNATIONAL SYMPOSIUM, pp. 51-56, 7-10, Sep.2007 [PDF].