IEEE 754 Compatible Floating Point Unit (FPU)

This web page has useful information about using the Floating Point Unit in your projects. The unit is based on the open source unit available at opencores.org. A synthesized version of that unit for Xilinx Virtex and Virtex 2 Pro FPGAs is available for download below.

1. Documentation on the unit (fpu.pdf)
   
2. Synthesized Xilinx IP Core of IEEE 754 Compatible FPU (Solaris, Windows)
1. To use it, extract the unit to your Xilinx installation root directory. Xilinx CORE Generator will list it under Math/Arithmetic & Logic Unit (version 1.2)
2. Document on how to use the unit in Xilinx ISE Project (fpunotes.doc)
   
3. Verilog files for the unit (fpufiles.zip)
4. Matlab program to convert a real number to a number in IEEE 754 floating point format (dec2ieee754.m)
5. Matlab program to convert a number in IEEE 754 floating point format to a real numbers (ieee7542dec.m)

FAQs:

1. What is the latency of the unit?
• 4 clock cycles. Use dummy states (that don't do anything for 4 clock cycles) to use it inside a Finite State Machine. Or you can use a counter that counts up to 4.
2. How to simulate the FPU in ModelSim with rest of the VHDL code
• More information here.

c-amin@northwestern.edu) or Yehea Ismail (ismail@ece.northwestern.edu)