Giang Hoang Web site: www.ece.northwestern.edu/~gho705 Phone: (570)578-7225 Email: giang.hoang@u.northwestern.edu *Education: + Northwestern University, Evanston, IL: PhD Candidate in Computer Engineering, expected 2012 - Research Topic: Computer Architecture. Advisor: Professor Russell Joseph. + Bucknell University, Lewisburg, PA, graduated in 2007: BSE in Computer Science and Engineering, BA in Math, minor in Physics - Cumulative GPA: 3.85/4.0, Engineering GPA: 3.89/40. - Member of Phi Beta Kappa, Tau Beta Pi. * Publications: + Giang Hoang, Robert Bruce Findler, Russ Joseph. "Exploring circuit timing-aware language and compilation." In proceedings of the 16th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS 2011). Acceptance Rate: 21.1% (32/152) + Giang Hoang, Chang Bae, John Lange, Lide Zhang, Russ Joseph, Peter Dinda. "A case for Alternative Nested Paging Models for Virtualized Systems." Computer Architecture Letters, Volume 9, Number 1, January-June, 2010. * Research Experience: + Graduate Research Assistant, Northwestern University, Fall 2007 to present - Compiler techniques to support timing speculation processors: Study instruction timing characteristics behavior in timing speculative processors and develop compiler optimizations to reduce error rates and improve performance; model an in-order pipelined Alpha processor using Verilog for timing simulation and implement compiler optimizations based on LLVM framework. - Alternative approaches to x86 nested paging virtualization: Investigate into replacing the nested multi-level forward page table with a single-level hashed page table to reduce memory access overhead of nested page walks im memory virtualization; use Simics and Flexus simulator extensively for modelling. - Power mangement policies for multithreaded applications: Explored opportunities in barrier synchronizations to apply dynamic voltage and frequency scaling to reduce power consumption; used M5 full-system simulator and Splash, SPEC OMP benchmarks for modelling. + Computer Science Undergraduate Research Program, Bucknell University, Summer 2005 - Developed a translator that converts nesC applications to those in C++ to support the operation of a simulator for wireless sensor network running TinyOS. + Physics Research Experience for Undergraduate, Bucknell University, Summer 2004 - Set up simulations and analyzed output data to study single particle jumps in supercooled liquid above the glass transition. * Work Experience: + Teaching Assistant -- Northwestern University, Bucknell University - Courses: Computer Architecture, Data Structures, Operating System, Programming Language Design, Introduction to Computer Engineering, Engineering Analysis (Matlab Programming). + Technology Support Consultant, Bucknell University, 5/2003-5/2007 - Provide telephone and walk-in assistance to all campus members on all supported computer systems and multimedia topics. - Received "Going the Extra Mile Award". * Skills: + Operating Systems: Unix/Linux, Windows. + Programming Languages: - Proficient with C/C++ with 7 years of experience, program extensively in course and research projects. - Proficient with Verilog, use regularly for RTL modelling. - Familiar with Python. - Previously worked with VHDL, PLT Scheme, Java, Perl, Smalltalk, Qt GUI programming, Alpha/X86/MIPS Assembly, Matlab. + Tools and Applications: - LLVM compiler infrastructure. - M5 full-system simulator, Flexus, Simics. - Pintool - a binary instrumentation application. - Familiar with ASIC design flow using Synopsys Design Compiler, PrimeTime and VCS for gate-level synthesis, timing analysis and simulation. + Relevant courses: - Advanced Computer Architecture, Parallel Computer Architecture - VLSI System Design - Design and Analysis of High-speed Integrated Circuits - ASIC and FPGA Design - Operating System Design - Resource Virtualization - Object-oriented Programming Languages and Environments.