1. VPR Routing Analysis tool: I added a module in route_common.c in VPR source code to find the routing patterns and to analyze the routing produced by VPR. A similar tool was developed by Express Lab, ECE Department, UCSB but the source code was not available. I am putting up the source code so that it can be used by other's doing FPGA research. Some information about the working of the code:
a) It makes the routing tree for each net given by the routing of the VPR.
b) The tree is implemented using a binary implementation of an n-ary tree.
c) The output file is sink-to-source.out which shows the sink to source paths for each net. The path contains inode values which are corresponding to the routing resource graph. Each routing resource has an unique inode value and the path shows the inode values.
Click on the link for the source code. Feel free to mail me if you have any questions.
2. Incremental min period retiming algorithms for general delay models (Paper accepted in TAU 2009/Detailed paper submitted to ICCAD 2009). CPLEX libraries are needed for compilation.
Click on the link for the source code. Feel free to mail me if you have any question. Cite the paper if you are using/modifying the code for your work.
3. Gate Sizing is a widespread technique used for circuit optimization. Modeling the gate delay arcs as posynomials of gate sizes, gate sizing can be formulated as a posynomial programming problem. The delay constraints are posynomials while the objective function can be linear if we are optimizing area or dynamic power, and quadratic if we are optimizing leakage power. Initial researches used geometric programming for gate sizing but they are slow. Recent researches used two stage LR techniques and we improve upon lagrangian relaxation technique for gate sizing to incorporate complex cost function. Here are few key improvements in our solver
a) Subgradient optimization is improved by using a min-cost flow based feasible direction solver.
b) LRS/mu is solved using a combination of techniques. We identify if a closed form solution is possible and solve analytically if a linear/quadratic/cubic/quartic form exists. If we are unable to get a closed form solution we use general purpose one dimensional function minimizer using derivative (Brent algorithm with derivatives) or Newton Raphson root finder.
c) A previous research used SQP to solve quadratic costs in gate sizing but we can handle dense quadratic cost functions. For temperature aware design optimization, SQP is inefficient because of the dense cost function. We use a Conjugate gradient based interpolating algorithm for efficient dense quadratic cost function evaluation.
Please click on the link for the source code. README show how to use the program. Feel free to mail me if you have any question. Cite the ICCAD 2007/TCAD 2009 paper if you are using/modifying the code for your work.
Last updated: January 2012